Integrated circuits (ICs) and other electronic devices often include arrangements of interconnected field effect transistors (FETs), also called metal-oxide-semiconductor field effect transistors (MOSFETs), or simply MOS transistors or devices. A typical MOS transistor includes a gate electrode as a control electrode, and spaced apart source and drain electrodes. A control voltage applied to the gate electrode controls the flow of current through a controllable conductive channel between the source and drain electrodes.
Power transistor devices are designed to be tolerant of the high currents and voltages that are present in power applications such as motion control, air bag deployment, and automotive fuel injector drivers. One type of power MOS transistor device is a laterally diffused metal-oxide-semiconductor (LDMOS) transistor device. In an LDMOS device, a drift space is provided between the channel region and the drain region.
LDMOS transistor devices are often characterized by a safe operating area, in which the operating current and voltage levels are below levels that would result in device destruction or other damage. The electrical safe operating area of a device relates to the generation of secondary charge carriers through impact ionization. In an n-channel LDMOS transistor device, electrons may generate additional electron-hole pairs via impact ionization after being accelerated in a region having a high electric field, such as near the drain boundary. If a sufficient number of holes—the secondary charge carriers—are created to raise the potential of the body of the LDMOS device to an extent that the junction with the source is forward biased, the resulting injection of the holes across the junction can activate a parasitic npn bipolar transistor formed via the source (emitter), body (base), and drain (collector) regions of the LDMOS transistor device. Very large, damaging currents can occur via the activation of the parasitic bipolar transistor, an operating condition referred to as “snapback.”
Damage may also occur in LDMOS transistor devices when operated outside of a thermal safe operating area of the device. The thermal safe operating area specifies the voltage and current levels in which the device may operate without damage arising from excessive heat. In some cases, the energy handling capability of a device leads to a thermal operating area more restrictive than the electrical safe operating area.
Attempts to remain within both the electrical safe operating area and the thermal safe operating area are often undesirably limiting factors for device operation and application. For example, applications in which a large LDMOS transistor device is connected to an inductive load may involve switching transients that drain large amounts of energy from the inductive load to the LDMOS transistor device. LDMOS transistor devices may thus experience thermal and/or electrical failure during switching.